Top Articles for IEEE Transactions on Circuits and Systems I PDFs Downloaded from January - June 2010
Source of Statistics: IEEE Xplore weblogs. Note: These are not COUNTER-compliant usage statistics, which means they have not been scrubbed for automatic download tools. See worksheet for ranking of periodical titles based on overall 2010 usage.
Article Title	Volume	Issue	2010 Jan - June Use By Article
Statistical Design of the 6T SRAM Bit Cell	57	1	1203
A Wideband Low Power Low-Noise Amplifier in CMOS Technology	57	4	784
Analysis and Design of Voltage-Controlled Oscillator Based Analog-to-Digital Converter	57	1	721
A frequency compensation scheme for LDO voltage regulators	51	6	688
Time-to-Digital Converter for Frequency Synthesis Based on a Digital Bang-Bang DLL	57	3	665
Noise in Current-Commutating Passive FET Mixers	57	2	650
Full On-Chip CMOS Low-Dropout Voltage Regulator	54	9	601
Analysis of multistage amplifier-frequency compensation	48	9	599
Fast and Accurate Analysis of Supply Noise Effects in PLL With Noise Interactions	57	1	588
Design and Analysis of Ultra Low Power True Single Phase Clock CMOS 2/3 Prescaler	57	1	580
A CMOS Low Noise, Chopper Stabilized Low-Dropout Regulator With Current-Mode Feedback Error Amplifier	55	10	560
A Low-Power Quadrature VCO and Its Application to a 0.6-V 2.4-GHz PLL	57	4	555
A Li-Ion Battery Charger With Smooth Control Circuit and Built-In Resistance Compensator for Achieving Stable and Fast Charging	57	2	545
Spectral Analysis of Phase Noise in Bipolar LC-Oscillators—Theory, Verification, and Design	57	4	542
Design of a Solar-Harvesting Circuit for Batteryless Embedded Systems	56	11	533
Phase noise in oscillators: a unifying theory and numerical methods for characterization	47	5	505
Grid-Connected Photovoltaic Generation System	55	3	473
Phase Noise in LC Oscillators: A Phasor-Based Analysis of a General Result and of Loaded Q	57	6	472
Analysis of Adaptive Digital Feedback Linearization Techniques	57	2	468
Settling Time Optimization for Three-Stage CMOS Amplifier Topologies	56	12	458
VCO Design With On-Chip Calibration System	53	10	444
Development of Single-Transistor-Control LDO Based on Flipped Voltage Follower for SoC	55	5	442
Generalized Time- and Transfer-Constant Circuit Analysis	57	6	434
An Interpolating Digitally Controlled Oscillator for a Wide-Range All-Digital PLL	56	9	432
Modeling Segmented-Ladder DACs	57	1	424