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Top Downloaded papers in 2005 - TCAS-I |
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Authors |
Paper Title |
Volume |
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Jakimoski, G.; Kocarev, L. |
Chaos and cryptography: block encryption ciphers based on chaotic maps |
48 (2): 163-169 |
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Heydari, P. |
Analysis of the PLL jitter due to power/ground and substrate noise |
51 (12): 2404- 2416 |
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Chava, C.K.; Silva-Martinez, J. |
51(6): 1041- 1050 |
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Hao Zhong; Tong Zhang |
52 (4): 766- 775 |
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Arora, H.; Klemmer, N.; Morizio, J.C.; Wolf, P.D. |
Enhanced phase noise modeling of fractional-N frequency synthesizers |
52 (2): 379- 395 |
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Dong-Young Chang; Gil-Cho Ahn; Un-Ku Moon |
Sub-1-V design techniques for high-linearity multistage/pipelined analog-to-digital converters |
52 (1): 1- 12 |
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Lerdworatawee, J.; Won Namgoong |
51 (6): 1075- 1087 |
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Hanumolu, P.K.; Brownlee, M.; Mayaram, K.; Un-Ku Moon |
51 (9): 1665- 1674 |
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van Staveren, A.; Verhoeven, C.J.M.; van Roermund, A.H.M. |
43 (4): 290-300 |
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Starzyk, J.A.; Ying-Wei Jan; Fengjing Qiu |
48 (3): 350-359 |
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Ghovanloo, M.; Najafi, K. |
A wideband frequency-shift keying wireless link for inductively powered biomedical implants |
51 (12): 2374- 2383 |
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Demir, A.; Mehrotra, A.; Roychowdhury, J. |
Phase noise in oscillators: a unifying theory and numerical methods for characterization |
47 (5): 655-674 |
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Keane, J.P.; Hurst, P.J.; Lewis, S.H. |
Background interstage gain calibration technique for pipelined ADCs |
52 (1): 32- 43 |
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Da Dalt, N. |
A design-oriented study of the nonlinear dynamics of digital bang-bang PLLs |
52 (1): 21- 31 |
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Malcovati, P.; Brigati, S.; Francesconi, F.; Maloberti, F.; Cusinato, P.; Baschirotto, A. |
Behavioral modeling of switched-capacitor sigma-delta modulators |
50 (3): 352- 364 |
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Hurst, P.J.; Lewis, S.H.; Keane, J.P.; Aram, F.; Dyer, K.C. |
51 (2): 275- 285 |
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Galan, J.; Carvajal, R.G.; Torralba, A.; Munoz, F.; Ramirez-Angulo, J. |
A low-power low-voltage OTA-C sinusoidal oscillator with a large tuning range |
52 (2): 283- 291 |
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Mehrotra, A. |
49 (9): 1309- 1316 |
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Martin, K.W. |
51 (9): 1823- 1836 |
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Sivonen, P.; Vilander, A.; Parssinen, A. |
52 (2): 305- 317 |
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Chung-Yun Chou; Chung-Yu Wu |
52 (5): 825- 833 |
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Staszewski, R.B.; Fernando, C.; Balsara, P.T. |
Event-driven Simulation and modeling of phase noise of an RF oscillator |
52 (4): 723- 733 |
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Ka Nang Leung; Mok, P.K.T. |
48 (9): 1041-1056 |
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Kozak, M.; Kale, I. |
Rigorous analysis of delta-sigma modulators for fractional-N PLL frequency synthesis |
51 (6): 1148- 1162 |
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Man Guo; Ahmad, M.O.; Swamy, M.N.S.; Chunyan Wang |
FPGA design and implementation of a low-power systolic array-based adaptive Viterbi decoder |
52 (2): 350- 365 |